Please use this identifier to cite or link to this item:
https://dr.ddn.upes.ac.in//xmlui/handle/123456789/2126| Title: | Design and FPGA Implementation of Digital PLL and Its Application in FM |
| Authors: | Kumari, Vijaya |
| Issue Date: | 2015 |
| Publisher: | B.Tech.(Electronics Engineering) |
| Citation: | Submitted under the guidance of:Dr. Adesh Kumar |
| URI: | http://hdl.handle.net/123456789/2126 |
| Appears in Collections: | Under Graduate |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Kumari_Vijaya.pdf | 3.26 MB | Adobe PDF | View/Open |
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