Please use this identifier to cite or link to this item:
https://dr.ddn.upes.ac.in//xmlui/handle/123456789/2125Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Srivastava, Pragyan | - |
| dc.date.accessioned | 2015-05-22T06:45:50Z | - |
| dc.date.available | 2015-05-22T06:45:50Z | - |
| dc.date.issued | 2015 | - |
| dc.identifier.citation | Submitted under the guidance of:Dr. Adesh Kumar | en_US |
| dc.identifier.uri | http://hdl.handle.net/123456789/2125 | - |
| dc.publisher | B.Tech.(Electronics Engineering) | en_US |
| dc.title | Design and FPGA Implementation of Optical Character Reorganization Method Using VHDL | en_US |
| dc.type | Other | en_US |
| Appears in Collections: | Under Graduate | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Pragyan Srivastava.pdf | 1.86 MB | Adobe PDF | View/Open |
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